| NXPLOS
Series PLDRO: External Reference, Phase Locked DRO (PLDRO) |
| Frequency
Range in GHz (1) |
3.0
- 7.99 * |
8.0-13.99 |
14.0-16.0 |
16.01-18.0** |
| Output
Power (over temperature) (min) (1) |
+12
dBm |
+11
dBm |
+10
dBm |
+8
dBm |
| Frequency
Stability (over temp) (max) |
Coherent to External Reference. |
| Power
variation (over temperature) (max) |
+/-
1.0 dB |
+/-
1.5 dB |
+/-
1.5 dB |
+/-
1.5 dB |
| Pulling
(1.5:1 VSWR) (max) |
Will not break lock. |
| Harmonics
(typ) |
-15
dBc |
-20
dBc |
-25
dBc |
-25
dBc |
| Discrete
Spurious (Fo<+/- 300 MHz) |
-75
dBc |
-75
dBc |
-75
dBc |
-70
dBc |
| Discrete
Spurious (Fo>+/- 300 MHz) (2) |
-65
dBc |
-65
dBc |
-65
dBc |
-65
dBc |
| External
Reference Frequency (3) |
100 MHz nominal |
| External
Reference Input Power (4) |
+11 +/- 3 dBm nominal |
| Typical
Phase Noise (5) @ 100Hz offset |
-88
dBc/Hz |
-85
dBc/Hz |
-82
dBc/Hz |
-80
dBc/Hz |
|
@ 1KHz offset |
-107
dBc/Hz |
-103
dBc/Hz |
-100
dBc/Hz |
-97
dBc/Hz |
|
@ 10KHz offset |
-120
dBc/Hz |
-115
dBc/Hz |
-110
dBc/Hz |
-108
dBc/Hz |
|
@ 100KHz offset |
-125
dBc/Hz |
-120
dBc/Hz |
-115
dBc/Hz |
-113
dBc/Hz |
|
@ 1MHz offset |
-130
dBc/Hz |
-130
dBc/Hz |
-130
dBc/Hz |
-128
dBc/Hz |
| Phase
Lock Alarm |
Open Collector, locked open, unlocked ground |
| Phase
Voltage Monitor |
Option available |
| Operating
Temperature (base plate) (6) |
-10
to +60 deg C |
| Power
Supply (7) |
+12
+/- 3% VDC, 180 mA typ |
| RF
Connector: (2 places) |
SMA
Female |
| DC
Connector |
Solder
pin |
| Size
(8): |
2.25"
x 2.25" x .63" (53mm x 53mm x 16.0mm)
|
| Outline: |
DC200102 or Rev 4
|
| *Lower
frequency phase locked oscillators (300 - 3000 MHz) offered in similar
performance. |
| **
Higher frequency phase locked oscillators (18 to 23 GHz) offered in
similar performance. |
| Notes: |
| (1)
Typical power level at least 1 dB higher than minimum. Higher power level available. |
| (2)
Lower spurious option available. |
| (3)
Other Reference Frequencies to be specified by customer, contact factory
for details. |
| (4)
Lower reference input level @ 0+/- 3 dBm available as an option. |
| (5)
Guaranteed phase noise is 5 dB higher than typical, with acceptable
Reference Noise Floor
Typical phase noise within
loop bandwidth= 20 Log (N) + 3 dB, N is the Reference Multiples.
|
| (6)
Wider temperature range available. |
| (7)
Other supply voltage available. |
| (8)
Height dimension of .63" exclude tuning screw height (.25" max),
Height to be .75" under 8 GHz. |
| Unit
performances frequently meet or exceed typical level. |
Applications: PLDRO's have the best combination of ultra low phase noise and
excellent frequency accuracy when phase locked to a clean stable external
crystal reference. PLDRO's are ideal for high data rate 64 QAM and 128 QAM
digital communication systems in LMDS, MVDS and point to point digital radio
transceivers and Fiber Optic applications.